A single-crystal silicon wafer as a semiconductor device substrate is cut out from a single-crystal silicon ingot, and is produced by being subjected to various physical, chemical, and heat treatments. The single-crystal silicon ingot is usually obtained by the Czochralski method (hereinafter referred to as “CZ method”) in which a seed crystal is dipped in silicon melt in a quartz crucible and pulled up to grow a single crystal. However, micro defects called Grown-in defects are induced in the crystal during the single crystal growth.
The Grown-in defects depend on a pulling-up speed during the single crystal growth and a temperature distribution (temperature gradient in crystal in a pulling-up axis direction) in the single crystal immediately after solidification. In the single crystal, the Grown-in defect exists in the form of a hole aggregation defect called COP (Crystal Originated Particle), having a size ranging from about 0.1 to 0.2 μm, or in the form of a defect including a micro dislocation called a dislocation cluster, having a size of about 10 μm.
In the single-crystal silicon wafer produced by the CZ method, an Oxidation-induced Stacking Fault (hereinafter referred to as “OSF”) appearing in a ring shape may be generated when the single-crystal silicon wafer is subjected to a high-temperature oxidation heat treatment. A potential area where the OSF ring is generated depends on a thermal history of the crystal during growth, particularly on an influence of a pulling-up speed during growth. The area where the OSF ring appears shrinks from the outer peripheral side to the inner side of the crystal as the pulling-up speed is lowered.
In other words, the inner side area of the OSF ring is spread to the whole wafer when the single crystal is grown at a higher speed, and the outside area of the OSF ring is spread to the whole wafer when the single crystal is grown at a lower speed.
In the case where OSF exists on a wafer surface which is of a device activation area, the OSF causes a leak current to deteriorate a device characteristic. A COP is a factor which lowers an initial oxide-film withstand voltage, and the dislocation cluster also causes a defective characteristic of the device formed therein.
Therefore, the single crystal is conventionally grown at a high pulling-up speed such that the ring-shaped OSF generation area is located in the outer peripheral portion of the crystal. For example, as described in Japanese Patent Application Publication No. 2002-145698, there is proposed a wafer in which growth and cooling conditions for an ingot near a single-crystal growth interface are adjusted to widely distribute the OSF area from a circumferential marginal portion to a central portion of the wafer and a micro COP area is formed inside the OSF area.
However, “a single-crystal silicon wafer in which the number of Grown-in defects including extremely small COPs is decreased as much as possible” (hereinafter referred to as a “defect-free crystal silicon wafer”) is produced with the advance of the fine processing of the semiconductor device to cope with growing demand of recent miniaturization and high performance.
Accordingly, a COP evaluation is made in the defect-free crystal silicon wafer. In the COP evaluation, examples of the COP detection method include a method in which a surface defect inspection apparatus (for example, SP2: product of KLA-Tencor) is used and a method called a copper deposition method (copper decoration method).
That is, an acceptance determination in which crystal integrity (defect-free) is judged by the number of defects (COPs) and/or the presence or absence of a specific pattern through the COP evaluation is made, and it is determined that the wafer is rejected when the number of COPs exceeds a defined number in the whole surface of the wafer or when the pattern exists (is generated).
As used herein, the “COP” means the COP as a Grown-in defect induced into the crystal during the above single crystal growth (hereinafter referred to as “COP”, and referred to as “crystal-induced COP” particularly when in need to distinguish from others). Other COPs arising from a factor such as micro flaw and scratch in handling the wafer (defects except the crystal-induced COP are referred to as “non-crystal-induced COP”) are not an intrinsic defect derived from the single-crystal silicon itself, so that the non-crystal-induced COP is irrelevant and removed from the COP evaluation object.
The “pattern” is one of modes of the crystal-induced COP which is attributed to the facts that: a thermal history of the grown single-crystal silicon ingot is symmetric about the axis of pulling-up; and pulling-up speeds and Grown-in defect distribution have a particular relationship. Generally, the disc-shaped pattern (disc pattern) appears in a central portion of the wafer, the ring-shaped pattern (ring pattern) appears in an outer peripheral portion of the wafer, or both the disc pattern and the ring pattern co-existingly appear (ring and disc pattern). The pattern may not appear, whereas a specific mode with high density in the whole surface of the wafer emerges.